Universität Paderborn - Die Universität der Informationsgesellschaft

Publications

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Journal papers

  • M. Grad and C.Plessl. On the feasibility and limitations of just-in-time instruction set extension for FPGA-based reconfigurable processors. Int. Journal of Reconfigurable Computing (IJRC), 2011. In press, preprint available: (doi:10.1155/2012/418315).
  • T. Schumacher, C. Plessl, and M. Platzner. IMORC: an infrastructure and architecture template for implementing high-performance reconfigurable FPGA accelerators. Microprocessors and Microsystems Journal, 2011. (doi:10.1016/j.micpro.2011.04.002).

  • P. Kaufmann, K. Glette, M. Platzner, and J. Torresen. Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture. Intl. J. Adaptive, Resilient and Autonomic Systems (IJARAS), 2011. (to appear) [ pdf | bib | doi ]

  • Markus Happe, Enno Lübbers and Marco Platzner. A Self-adaptive Heterogeneous Multi-core Architecture for Embedded Real-time Video Object Tracking. In International Journal of Real-Time Image Processing, Special Issue, 16 pages, 2011, Springer Berlin / Heidelberg. [ bib and abstract | doi ]
  • Stephanie Drzevitzky, Uwe Kastens and Marco Platzner. Proof-Carrying Hardware: Concept and Prototype Tool Flow for Online Verification. International Journal of Reconfigurable Computing, vol. 2010, Article ID 180242, 11 pages, 2010. [ PDF | BibTeX | doi ]
  • Udo Kebschull, Marco Platzner and Jürgen Teich. Selected papers from the 18th International Conference on Field Programmable Logic and Applications, FPL 2008 (Editorial). Computers & Digital Techniques, IET, vol. 4, no. 3, pp. 157-158, May 2010 (doi:0.1049/iet-cdt.2010.9044)
  • Enno Lübbers and Marco Platzner. ReconOS: Multithreaded Programming for Reconfigurable Computers. ACM Transactions on Embedded Computing Systems. 9(1):1-33, 2009.
  • Klaus Danne, Roland Mühlenbernd, and Marco Platzner. Server-based Execution of Periodic Tasks on Dynamically Reconfigurable Hardware. IET Computers & Digital Techniques. 1(4):295-302, July 2007. (doi:10.1049/iet-cdt:20060186) download [ PDF | BibTeX and abstract ]
  • Neil Bergmann, Marco Platzner, and Jürgen Teich. Dynamically Reconfigurable Architectures (Editorial). EURASIP Journal on Embedded Systems. 2007. (doi:10.1155/2007/28405) download [ PDF | BibTeX ]
    • Christian Plessl, Rolf Enzler, Herbert Walder, Jan Beutel, Marco Platzner, Lothar Thiele, and Gerhard Tröster. The Case for Reconfigurable Hardware in Wearable Computing. Personal and Ubiquitous Computing. pages 299-308, October 2003. Springer-Verlag London. (doi:10.1007/s00779-003-0243-x) download [ PDF | BibTeX and abstract ]
    • Oskar Mencer, Marco Platzner, Martin Morf, and Michael J. Flynn. Object-Oriented Domain Specific Compilers for Programming FPGAs. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 9(1):205-210, February 2001. (doi:10.1109/92.920835) download [ PDF | BibTeX and abstract ]
    • Michael Eisenring and Marco Platzner. Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems. IEE Proceedings - Computers and Digital Techniques, 147(3):159-165, May 2000. (doi:10.1049/ip-cdt:20000496) download [ PDF | BibTeX and abstract ]
    • Marco Platzner. Reconfigurable Computer Architectures. e&i Elektrotechnik und Informationstechnik, 115(3):143-148, 1998. Springer. (e&i) download [ PDF | BibTeX and abstract ]
    • Marco Platzner and Bernhard Rinner. Design and Implementation of a Parallel Constraint Satisfaction Algorithm. International Journal of Computers and Their Applications, 5(2):106-116, June 1998. ISCA. (ISCA) download [ PDF | BibTeX and abstract ]
    • Marco Platzner, Bernhard Rinner, and Reinhold Weiss. A Computer Architecture to Support Qualitative Simulation in Industrial Applications. e&i Elektrotechnik und Informationstechnik, 114(1):13-18, 1997. Springer. (e&i) download [ BibTeX ]
    • Marco Platzner, Bernhard Rinner, and Reinhold Weiss. Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation. J.UCS Journal of Universal Computer Science. 1(12):811-820, December 1995. Springer. (document url) download [ PDF | BibTeX and abstract ]

    Co-edited books and book chapters

    • C. Plessl and M. Platzner. Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility, chapter Hardware Virtualization on Dynamically Reconfigurable Embedded Processors. IGI Global, Hershey, PA, USA, 2011 (doi:10.4018/978-1-60960-086-0).
    • P. Kaufmann, and M. Platzner. Multi-objective Intrinsic Evolution of Embedded Systems. In C. Müller- Schloer, H. Schmeck, and T. Ungerer, editors, Organic Computing — A Paradigm Shift for Complex Systems. Springer Basel, 2011. [ bib | doi ]

    • P. Kaufmann, C. Plessl, and M. Platzner. EvoCaches: Application-specific Adaptation of Cache Mappings. In J. F. Miller, editor, Cartesian Genetic Programming. Natural Computing Series. Springer, 2011. [ bib | doi ]

    • P. Kaufmann, and M. Platzner
      Modular Cartesian Genetic Programming: Cone-based Crossover [ bib | doi ]
      Modular Cartesian Genetic Programming: Cone- and Age-based Module Creation [ bib | doi ]
      Classification Hardware Evolution Using Modular Approach [ bib | doi ] 
      In J. F. Miller, editor, Cartesian Genetic Programming. Natural Computing Series. Springer, 2011.

    • Jason Agron, David Andrews, Markus Happe, Enno Lübbers, and Marco Platzner. Reconfigurable Embedded Control Systems: Applications for Flexibility and Agility, chapter Multithreaded Programming of Reconfigurable Embedded Systems. IGI Global, November 2010, ISBN: 9781609600860.
    • Toomas  P. Plaks (editor), David Andrews, Ronald DeMara, Herman Lam, Jooheung Lee, Christian Plessl, and Greg Stitt (associate editors). Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'10). CSREA Press, July 2010.

    • Marco Platzner, Jürgen Teich, and Norbert Wehn (editors). Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications. 2010, Springer, ISBN: 978-90-481-3484-7.

    • Enno Lübbers and Marco Platzner. ReconOS: An Operating System for Dynamically Reconfigurable Hardware. In Marco Platzner, Jürgen Teich, and Norbert Wehn (editors): Dynamically Reconfigurable Systems: Architectures, Design Methods and Applications, 2010, Springer, ISBN: 978-90-481-3484-7.
    • Udo Kebschull, Marco Platzner, and Jürgen Teich (editors). Proceedings of the 18th International Conference on Field-Programmable Logic and Applications (FPL), Heidelberg, Germany, September 2008. IEEE.
    • Marco Platzner, Karl-Erwin Großpietsch, Christian Hochberger, and Andreas Koch (editors). Workshop Proceedings of the 20th International Conference on Architectures of Computing Systems. Zurich, Switzerland, March 2007. VDE Verlag, ISBN 978-3-8007-3015-5.
    • Toomas P. Plaks (editor) and R. DeMara, M. Gokhale, S. Guccione, M. Platzner, G. Smit and M. Wirthlin (associate editors). Proceedings of the 6th International Conference on Engineering of Reconfigurable Systems and Algorithms. Las Vegas, Nevada, USA, June 2006. CSREA Press.
    • Toomas P. Plaks (editor) and R. DeMara, M. Gokhale, S. Guccione, M. Platzner, G. Smit and M. Wirthlin (associate editors). Proceedings of the 5th International Conference on Engineering of Reconfigurable Systems and Algorithms. Las Vegas, Nevada, USA, June 2005. CSREA Press.
    • Jürgen Becker, Marco Platzner, and Serge Vernalde (Eds.). Proceedings of the 14th International Conference on Field-Programmable Logic and Applications (FPL), LNCS 3203, Antwerp, Belgium, August/September 2004. Springer, ISBN: 978-3-540-22989-6.

    • Toomas P. Plaks (editor), M. Gokhale, M. Leeser, M. Platzner, G. Smit, and M. Wirthlin (associate editors). Proceedings of the 4th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'04). Las Vegas, Nevada, USA, June 2004. CSREA Press.
    • Toomas P. Plaks (editor), P. Athanas, M. Platzner, M. Gokhale, J. Reed (associate editors). Proceedings of the 3rd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'03). Las Vegas, Nevada, USA, June 2003. CSREA Press.
    • Toomas P. Plaks, Peter M. Athanas (editors), H.R.Arabnia, J. Becker, M. Gokhale, M. Gorgon, and M. Platzner (associate editors). Proceedings of the 2nd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'02). Las Vegas, Nevada, USA, June 2002. CSREA Press.

    Conference papers

    • T. Kenter, C. Plessl, M. Platzner, and M. Kauschke. Estimation and partitioning for CPU-accelerator architectures. Presented at Intel European Research and Innovation Conference, Oct. 2011.
    • Markus Happe, Andreas Agne and Christian Plessl. Measuring and Predicting Temperature Distributions on FPGAs at Run-Time. In Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), Cancun, Mexico. 2011. IEEE. [ PDF | BibTex | talk ]

    • Tobias Beisel, Tobias Wiersema, Christian Plessl and André Brinkmann. Cooperative Multitasking for Heterogeneous Accelerators in the Linux Completely Fair Scheduler. In Proc. IEEE Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP). IEEE Computer Society, September 2011. [ PDF | BibTeX | Poster ]

    • Tobias Graf, Ulf Lorenz, Marco Platzner and Lars Schaefers. Parallel Monte-Carlo Tree Search for HPC Systems. In Proceedings of the 17th International Conference, Euro-Par 2011. Bordeaux, France, August/September 2011. LNCS, vol. 6853, pp. 365-376. Springer, Heidelberg. [ PDF | doi ]
    • A. Boschmann, P. Kaufmann, and M. Platzner. Accurate Gait Phase Detection using Surface Electromyographic Signals and Support Vector Machines. IEEE Intl. Conf. Bioinformatics and Biomedical Technology (ICBBT). [ pdf | bib ]

    • Björn Meyer and Christian Plessl and Jens Förstner. Transformation of Scientific Algorithms to Parallel Computing Code: Single GPU and MPI multi GPU Backends with Subdomain Support. In Symposium on Application Accelerators in High Performance Computing (SAAHPC), 2011. Knoxville, Tennessee, USA, Juli 2011. IEEE. [ PDF | BibTeX | Poster | doi:10.1109/SAAHPC.2011.12 ]
    • M. Grad and C. Plessl. Just-in-time instruction set extension – feasibility and limitations for an FPGA-based reconfigurable ASIP architecture. In Proc. Reconfigurable Architectures Workshop (RAW), pages 278–285, Washington, DC, USA, May 2011. IEEE Computer Society.
    • Stephanie Drzevitzky and Marco Platzner. Achieving Hardware Security for Reconfigurable Systems on Chip by a Proof-Carrying Code Approach. 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2011. [ PDF | BibTeX | talk ]

      • Markus Happe and Enno Lübbers. A Hybrid Multi-Core Architecture for Real-Time Video Tracking. In FPL 2011 Workshop on Computer Vision on Low-Power Reconfigurable Architectures, 2011. [ PDF ]
      • Tobias Kenter, Christian Plessl, Marco Platzner, Michael Kauschke. Performance estimation framework for automated exploration of CPU-accelerator architectures. In Proc. 19th ACM/SIGDA international symposium on Field programmable gate arrays (FPGA), pages 177–180. ACM, 2011.
        download [ PDF | BibTeX ]

      • Ariane Keller, Bernhard Plattner, Enno Lübbers, Marco Platzner, and Christian Plessl. Reconfigurable nodes for future networks. In Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), pages 372–376. IEEE, December 2010.
        download [ PDF | BibTeX ]

      • Mariusz Grad and Christian Plessl. Pruning the design space for just-in-time processor customization. In Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), pages 67–72, Los Alamitos, CA, USA, December 2010. IEEE Computer Society. (doi:10.1109/ReConFig.2010.19)
        download [ PDF | BibTeX ]

      • T. Knieper, P. Kaufmann, K. Glette, M. Platzner, J. Torresen: Coping with Resource Fluctuations: The Run-time Reconfigurable Functional Unit Row Classifier Architecture. In 9th International Conference on Evolvable Systems - From Biology to Hardware (ICES), 2010, Springer. [ pdf | bib | talk | doi:10.1007/978-3-642-15323-5_22 ] (Won Best Student Paper Award)

      • P. Kaufmann and K. Englehart and M. Platzner: Fluctuating EMG Signals: Investigating Long-term Effects of Pattern Matching Algorithms. In 32nd Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC), 2010. [ pdf | bib | poster | doi:10.1109/IEMBS.2010.5627288 ]

      • Wilhelm Schäfer, Mauro Birattari, Johannes Blömer, Marco Dorigo, Gregor Engels, Rehan O‘Grady, Marco Platzner, Franz Rammig, Wolfgang  Reif, Ansgar Trächtler: Engineering Self-Coordinating Software Intensive Systems, 2010 FSE/SDP Workshop on the Future of Software Engineering, 1-4, 2010. to appear

      • Stephanie Drzevitzky. Proof-Carrying Hardware: Runtime Formal Verification for Secure Dynamic Reconfiguration. In Proceedings of the 20th International Conference on Field Programmable Logic and Applications (FPL), pages 255-258. Milano, Italy, August/September, 2010. IEEE. PhD Forum Presentation. [ PDF | BibTeX ]

      • Heiner Giefers and Marco Platzner. A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier. In Proceedings of the 20th International Conference on Field Programmable Logic and Applications (FPL), Milano, Italy, August/September, 2010. IEEE. [ PDF | BibTeX | Talk | doi ] (Nominated for Best Paper Award)
      • P. Kaufmann, T. Knieper and M. Platzner A Novel Hybrid Evolutionary Strategy and its Periodization with Multi-objective Genetic Optimizers. In Proceedings of IEEE Congress on Evolutionary Computation (CEC'10). 2010. IEEE. [ pdf | bib | talk | doi:10.1109/CEC.2010.5586541 ]
      • Heiner Giefers and Marco Platzner. A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics. In Proceedings of the 10th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), Las Vegas, Nevada, USA, July 2010. CSREA Press. to appear

      • David Andrews and Christian Plessl. Configurable processor architectures: History and trends. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), page 165. CSREA Press, July 2010. Invited paper. [ PDF | BibTeX | Talk ]

      • Enno Lübbers, Marco Platzner, Christian Plessl, Ariane Keller, and Bernhard Plattner. Towards adaptive networking for embedded devices based on reconfigurable hardware. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), pages 225–231. CSREA Press, July 2010. [ PDF | BibTeX ]

      • Mariusz Grand and Christian Plessl. An open source circuit library with benchmarking facilities. In Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), pages 144–150. CSREA Press, July 2010. [ PDF | BibTeX ]

      • Tobias Beisel, Manuel Niekamp and Christian Plessl. Using shared library interposing for transparent acceleration in systems with heterogeneous hardware accelerators. In Proc. IEEE Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP). IEEE Computer Society, July 2010. [ PDF | BibTeX | Talk ]

      • Tobias Kenter, Marco Platzner, Christian Plessl, and Michael Kauschke. Performance estimation for the exploration of CPU-accelerator architectures. In Omar Hammami and Sandra Larrabee, editors, Proc. Workshop on Architectural Research Prototyping (WARP), June 2010. [ PDF | BibTeX | Talk ]
      • Matthias Woehrle, Christian Plessl, and Lothar Thiele. Rupeas: Ruby powered event analysis DSL. In Proc. Int. Conf. Network Sensing Systems (INSS), pages 245–248. IEEE, June 2010. [ PDF | BibTeX ]

      • Stephanie Drzevitzky, Uwe Kastens and Marco Platzner. Proof-carrying Hardware: Towards Runtime Verification of Reconfigurable Modules. In Proceedings of the International Conference on Reconfigurable Computing (ReConFig), pages 189-194. Cacun, Mexico, December 2009. IEEE. [ PDF | BibTeX | Talk | doi ]
      • Tobias Schumacher, Tim Süss, Christian Plessl and Marco Platzner. Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000. In Proceedings of the International Conference on Reconfigurable Computing (ReConFig), Cacun, Mexico, December 2009. IEEE. [ PDF | BibTeX ]
      • Markus Happe, Enno Lübbers and Marco Platzner. An Adaptive Sequential Monte Carlo Framework with Runtime HW/SW Repartitioning. In Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT), Sydney, Australia, December 2009. IEEE. [ PDF | BibTeX | Talk ]
      • Heiner Giefers and Marco Platzner. Program-Driven Fine-Grained Power Management for the Reconfigurable Mesh. In Proceedings of the 19th International Conference on Field Programmable Logic and Applications (FPL), Prague, Czech Republic, August/September 2009. IEEE. [ PDF | BibTeX | Talk | doi ]
      • Tobias Schumacher, Christian Plessl and Marco Platzner. An Accelerator for k-th Nearest Neighbor Thinning based on the IMORC Infrastructure. In Proceedings of the 19th International Conference on Field Programmable Logic and Applications (FPL), Prague, Czech Republic, August/September 2009. IEEE. [ PDF | BibTeX | doi ]
      • Enno Lübbers and Marco Platzner. Cooperative Multithreading in Dynamically Reconfigurable Systems. In Proceedings of the 19th International Conference on Field Programmable Logic and Applications (FPL), Prague, Czech Republic, August/September 2009. IEEE. [ PDF | BibTeX | Poster | doi ]
      • Paul Kaufmann, Christian Plessl and Marco Platzner. EvoCaches: Application-specific Adaptation of Cache Mappings. In Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems (AHS), San Francisco, CA, USA, June 2009. [ pdf | bib | talk | doi:10.1109/AHS.2009.26 ]

      • Mariusz Grad and Christian Plessl. Woolcano: An Architecture and Tool Flow for Dynamic Instruction Set Extension on Xilinx Virtex-4 FX. In FPGAs for Custom Computing Machines (FCCM), Napa, CA, USA, April 2009. IEEE CS Press.

      • Tobias Schumacher, Christian Plessl and Marco Platzner. IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing. In FPGAs for Custom Computing Machines (FCCM), Napa, CA, USA, April 2009. IEEE CS Press. (Won a HiPEAC-II Publication Award)

      • Heiner Giefers and Marco Platzner. ARMLang: A Language and Compiler for Programming Reconfigurable Mesh Many-Cores. In Reconfigurable Architectures Workshop (RAW), Proceedings of the International Parallel and Distributed Processing Symposium, Rome, Italy, May 2009. IEEE. [ PDF | BibTeX | Talk | doi ]
      • Heiner Giefers and Marco Platzner. Towards Models for Many-Cores: The Case for the Reconfigurable Mesh. In Proceedings of the Workshop on Many-Cores, International Conference on Architecture of Computing Systems (ARCS), Delft, Netherlands, March 2009. [ PDF | BibTeX | Talk | doi ]
      • Alexander Boschmann, Paul Kaufmann, Marco Platzner, and Michael Winkler. Towards Multi-movement Hand Prostheses: Combining Adaptive Classification with High Precision Sockets. In  Proceedings of the 2nd Technically Assisted Rehabilitation (TAR’09), Berlin, Germany, 2009. [ pdf | bib | talk ]
      • Markus Happe, Enno Lübbers, and Marco Platzner. A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms. In Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), Karlsruhe, Germany, March 2009. Springer. [ PDF | BibTeX | doi ]
      • Tobias Beisel, Stefan Lietsch and Kris Thielemans. A method for OSEM PET reconstruction on parallel architectures using STIR. In Nuclear Science Symposium Conference Record, 2008. NSS'08. IEEE, pages 4161-4168, Dresden, Germany, October 2008. IEEE. [ PDF | BibTeX | Poster ]
      • Enno Lübbers and Marco Platzner. A Portable Abstraction Layer for Hardware Threads. In Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL), Heidelberg, Germany, September 2008. IEEE. [ PDF | BibTeX | Talk | doi ]

      • J. Angermeier, M. Majer, J. Teich, L. Braun, T. Schwalb, P. Graf, M. Hübner, J. Becker, E. Lübbers, M. Platzner, C. Claus, W. Stechele, A. Herkersdorf, M. Rullmann and R. Merker. SPP1148 Booth: Fine Grain Reconfigurable Architectures. In Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL), Heidelberg, Germany, September 2008. IEEE.

        • Kyrre Glette, Jim Torresen, Paul Kaufmann, and Marco Platzner. A Comparison of Evolvable Hardware Architectures for Classification Tasks. In Proceedings of the 8th International Conference on Evolvable Systems: From Biology to Hardware (ICES), LNCS. Springer, September 2008.  [ pdf | bib | talk | doi:10.1007/978-3-540-85857-7_3 ]
        • Heiner Giefers. Reconfigurable Many-Cores with Lean Interconnect. In Proceedings of the 18th International Conference on Field Programmable Logic and Applications (FPL), Heidelberg, Germany, September 2008. IEEE. PhD Forum Presentation. [ PDF | BibTeX | Poster | doi ]
        • Marco Platzner, Sven Döhre, Markus Happe, Tobias Kenter, Ulf Lorenz, Tobias Schumacher, Andre Send, and Alexander Warkentin. The GOmputer: Accelerating GO with FPGAs. In Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), Las Vegas, Nevada, USA, July 2008. CSREA Press.
        • Enno Lübbers and Marco Platzner. Communication and Synchronization in Multithreaded Reconfigurable Computing Systems. In Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), Las Vegas, Nevada, USA, July 2008. CSREA Press. [ PDF | BibTeX | Talk ]
        • Tobias Schumacher, Robert Meiche, Paul Kaufmann, Enno Lübbers, Christian Plessl, and Marco Platzner. A Hardware Accelerator for k-th Nearest Neighbor Thinning. In Proceedings of the 8th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), Las Vegas, Nevada, USA, July 2008. CSREA Press. [ pdf | bib ]
        • Tobias Knieper, Bertrand Defo, Paul Kaufmann, and Marco Platzner. On Robust Evolution of Digital Hardware. In Proceedings of the 2nd IFIP Conference on Biologically Inspired Collaborative Computing (BICC), Milan, Italy, September 2008. Springer. [ pdf | bib | talk | doi:10.1007/978-0-387-09655-1_19 ]
        • Heiner Giefers and Marco Platzner. Realizing Reconfigurable Mesh Algorithms on Softcore Arrays. In Proceedings of the International Symposium on Systems, Architectures, Modeling and Simulation (SAMOS), Samos, Greece, July 2008. IEEE. [ PDF | BibTeX | Talk | doi ]
        • Paul Kaufmann and Marco Platzner. Advanced Techniques for the Creation and Propagation of Modules in Cartesian Genetic Programming. In Proceedings of the Genetic and Evolutionary Computation Conference (GECCO), Atlanta, Georgia, USA, July 2008. ACM. [ pdf | bib | talk | doi:10.1145/1389095.1389334 ]
        • Kyrre Glette, Jim Torresen, Thiemo Gruber, Bernhard Sick, Paul Kaufmann, and Marco Platzner. Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control. In Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems (AHS), Noordwijk, The Netherlands, June 2008. [ pdf | bib | talk | doi:10.1109/AHS.2008.12 ] (Won Best Paper Award in the 'Evolvable Hardware' Category)
        • Tobias Schumacher, Christian Plessl and Marco Platzner. IMORC: An Infrastructure for Performance Monitoring and Optimization of Reconfigurable Computers, Many-core and Reconfigurable Supercomputing Conference (MRSC), Belfast, UK, April 2008.
        • Tobias Schumacher, Enno Lübbers, Paul Kaufmann, and Marco Platzner. Accelerating the Cube Cut Problem with an FPGA-augmented Compute Cluster. In Proceedings of the ParaFPGA Symposium, International Conference on Parallel Computing (ParCo), Aachen/Jülich, Germany, September 2007. [ pdf | bib ]
        • Heiner Giefers and Marco Platzner. A Many-Core Implementation based on the Reconfigurable Mesh Model. In Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL), Amsterdam, Netherlands, August 2007. IEEE. [ PDF | BibTeX | Talk | doi ]
        • Enno Lübbers and Marco Platzner. ReconOS: An RTOS supporting Hard- and Software Threads. In Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL), Amsterdam, Netherlands, August 2007. IEEE. [ PDF | BibTeX | Talk | doi ]
        • Paul Kaufmann and Marco Platzner. MOVES: A Modular Framework for Hardware Evolution. In Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 2007. [ pdf | bib | talk | doi:10.1109/AHS.2007.73 ] (Won Best Paper Award in the 'Evolvable Hardware' Category)
        • Paul Kaufmann and Marco Platzner. Toward Self-adaptive Embedded Systems: Multiobjective Hardware Evolution. In Proceedings of the 20th International Conference on Architecture of Computing Systems (ARCS), Zurich, Switzerland, March 2007. Springer, LNCS 4415. [ pdf | bib | doi:10.1007/978-3-540-71270-1_15 ]
        • Christian Plessl, Marco Platzner, and Lothar Thiele. Optimal Temporal Partitioning Based on Slowdown and Retiming. In Proceedings IEEE International Conference on Field-Programmable Technology (FPT’06), December 2006. IEEE.
        • Paul Kaufmann and Marco Platzner. Multi-objective Intrinsic Hardware Evolution. In 2006 MAPLD International Conference, Washington D.C., USA, September 2006. [ pdf | bib | talk ]
        • Klaus Danne, Roland Mühlenbernd, and Marco Platzner. Executing Hardware Tasks on Dynamically Reconfigurable Devices under Real-time Conditions. In Proceedings of the 16th International Conference on Field Programmable Logic and Applications (FPL), August 2006. IEEE CS Press.
        • Klaus Danne and Marco Platzner. An EDF Schedulability Test for Periodic Tasks on Reconfigurable Hardware Devices. In ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), June 2006.
        • Klaus Danne and Marco Platzner. Partitioned Scheduling of Periodic Real-time Tasks onto Reconfigurable Hardware. In Proceedings of the 13th Reconfigurable Architectures Workshop(RAW), April 2006. IEEE CS Press.
        • Klaus Danne and Marco Platzner. A Heuristic Approach to Schedule Periodic Real-time Tasks on Reconfigurable Hardware. In Proceedings of the 15th International Conference on Field Programmable Logic and Applications (FPL), 2005, Tampere, Finland, IEEE CS Press.
        • Christian Plessl and Marco Platzner. Zippy - A Coarse-grained Reconfigurable Array with Support for Hardware Virtualization. In Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP), pages 213-218, July 2005, IEEE CS Press.
        • Klaus Danne and Marco Platzner. Memory-demanding Periodic Real-time Applications on FPGA Computers. In Work-in-Progress Proceedings of the 17th Euromicro Conference on Real-time Systems (ECRTS), July 2005.
        • Klaus Danne and Marco Platzner. Periodic Real Time Scheduling for FPGA Computers. In Proceedings of the Third IEEE International Workshop on Intelligent Solutions in Embedded Systems (WISES), May 2005, IEEE CS Press.
        • Herbert Walder and Marco Platzner. A Runtime Environment for Reconfigurable Operating Systems. In Proceedings 14th International Conference on Field-Programmable Logic and Applications (FPL), pages 831-835 Antwerp, Belgium, August/-September 2004. Springer.
          • Herbert Walder, Samuel Nobs and Marco Platzner. XF-BOARD: A Prototyping Platform for Reconfigurable Hardware Operating Systems. In Proceedings of the 4th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), Las Vegas, Nevada, USA, June 2004. CSREA Press. Post Conference Proceedings.
          • Christian Plessl and Marco Platzner. Virtualization of Hardware - Introduction and Survey. In Proceedings of the 4th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), pages 63-69, Las Vegas, Nevada, USA, June 2004. CSREA Press.
          • Matthias Dyer, Marco Platzner and Lothar Thiele. Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine. In FPGAs for Custom Computing Machines (FCCM), Napa, CA, USA, April 2004. IEEE CS Press.
          • Christian Plessl and Marco Platzner. TKDM - A Reconfigurable Co-processor in a PC's Memory Slot. In Proceedings IEEE International Conference on Field-Programmable Technology (FPT'03), pages 252-259, Tokyo, Japan, December 2003. IEEE CS Press.
          • Christoph Steiger, Herbert Walder, Marco Platzner, and Lothar Thiele. Online Scheduling and Placement of Real-time Tasks to Partially Reconfigurable Devices In Proceedings 24th IEEE International Real-Time Systems Symposium (RTSS), pages 224-235, Cancun, Mexico, December 2003. IEEE CS Press.
          • Rolf Enzler, Christian Plessl, and Marco Platzner. Virtualizing Hardware with Multi-Context Reconfigurable Arrays. In Proceedings of the 13rd International Conference on Field Programmable Logic and Applications (FPL), pages 151-160, Lisbon, Portugal, September 2003. Springer.
          • Christoph Steiger, Herbert Walder, and Marco Platzner. Heuristics for Online Scheduling Real-time Tasks to Partially Reconfigurable Devices. In Proceedings of the 13rd International Conference on Field Programmable Logic and Applications (FPL), pages 575-584, Lisbon, Portugal, September 2003. Springer. (nominated for the Best Paper Award)
          • Herbert Walder and Marco Platzner. Reconfigurable Hardware Operating Systems: From Design Concepts to Realizations. In Proceedings of the 3rd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), pages 284-287, Las Vegas, Nevada, USA, June 2003. CSREA Press.
          • Rolf Enzler, Christian Plessl, and Marco Platzner. Co-Simulation of a Hybrid Multi-Context Architecture. In Proceedings of the 3rd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), pages 174-180, Las Vegas, Nevada, USA, June 2003. CSREA Press.
          • Herbert Walder, Christoph Steiger, and Marco Platzner. Fast Online Task Placement on FPGAs: Free Space Partitioning and 2D-Hashing. In Proceedings of the Reconfigurable Architectures Workshop (RAW'03), Nice, France, April 2003. IEEE CS Press. (doi.ieeecomputersociety.org/10.1109/IPDPS.2003.1213329) download [ PDF | BibTeX ]
          • Christian Plessl, Rolf Enzler, Herbert Walder, Jan Beutel, Marco Platzner, and Lothar Thiele. Reconfigurable Hardware in Wearable Computing Nodes. In Proceedings of the 6nd International Symposium on Wearable Computers (ISWC'02), Seattle, Washington, USA, October 2002. IEEE CS Press.
          • Matthias Dyer, Christian Plessl, and Marco Platzner. Partially Reconfigurable Cores for Xilinx Virtex. In Proceedings of the 12th International Conference on Field Programmable Logic and Application (FPL'02), pages 292-301, Montpellier, France, September 2002. Springer.
          • Herbert Walder and Marco Platzner. Non-preemptive Multitasking on FPGAs: Task Placement and Footprint Transform. In Proceedings of the 2nd International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA'02), pages 24-30, Las Vegas, Nevada, USA, June 2002. CSREA Press.
          • Christian Plessl and Marco Platzner. Custom Computing Machines for the Set Covering Problem. In FPGAs for Custom Computing Machines (FCCM), Napa, CA, USA, April 2002. IEEE CS Press.
          • Rolf Enzler, Marco Platzner, Christian Plessl, Lothar Thiele and Gerhard Troester. Reconfigurable Processors for Handhelds and Wearables: Application Analysis. In Reconfigurable Technology: FPGAs and Reconfigurable Processors for Computing and Communications III (ITCom 2001), pages 135-146, Proceedings of SPIE, Volume 4525, Denver, Colorado, USA, August 2001.
          • Christian Plessl and Marco Platzner. Instance-Specific Accelerators for Minimum Covering. In 1st International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), pages 85-91, Las Vegas, Nevada, USA, June 2001. CSREA Press.
          • Michael Eisenring and Marco Platzner. Optimization of Run-time Reconfigurable Embedded Systems. In 10th International Workshop on Field Programmable Logic and Applications, pages 565-574, Villach, Austria, August 2000. Springer.
          • Michael Eisenring and Marco Platzner. An Implementation Framework for Run-time Reconfigurable Systems. In Proceedings of the 2nd International Workshop on Engineering of Reconfigurable Hardware/Software Objects (ENREGLE), pages 151-157, Las Vegas, USA, June 2000. CSREA Press.
          • Michael Eisenring, Marco Platzner and Lothar Thiele. Communication Synthesis for Reconfigurable Embedded Systems. In Proceedings of the 9th International Workshop on Field Programmable Logic and Applications, pages 205-214, Glasgow, UK, August-September 1999. Springer.
          • Oskar Mencer and Marco Platzner. Dynamic Circuit Generation for Boolean Satisfiability in an Object-Oriented Design Environment. In Proceedings of the 32th Hawaiian International Conference on System Sciences HICSS-32, Maui, HI, USA, January 1999. IEEE CS Press.
          • Marco Platzner and Giovanni De Micheli. Acceleration of Satisfiability Algorithms by Reconfigurable Hardware. In Proceedings of the 8th International Workshop on Field Programmable Logic and Applications, pages 69-78, Tallinn, Estonia, August-September 1998. Springer.
          • Thomas Röwekamp, Marco Platzner, and Liliane Peters. Specialized Architectures for Optical Flow Computation: A Performance Comparison of ASIC, DSP, and Multi-DSP. In Proceedings of the 8th International Conference on Signal Processing Applications & Technology, pages 829-833, San Diego, CA, USA, September 1997.
          • Marco Platzner and Liliane Peters. Fast Signature Segmentation on a Multi-DSP Architecture. In Proceedings of the SPIE: Conference on Parallel and Distributed Methods for Image Processing, Volume 3166, San Diego, CA, USA, July 27 - August 1 1997.
          • Erich Lind, Marco Platzner, and Bernhard Rinner. A Multi-DSP System with Dynamically Reconfigurable Coprocessors. In Proceedings of the 7th International Conference on Signal Processing Applications & Technology, Boston, Massachusetts, USA, October 1996.
          • Robert Hranitzky and Marco Platzner. Design and Implementation of Adaptive Digital Filters on a Multi-TMS320C40 System. In Proceedings of the 6th International Conference on Signal Processing Applications & Technology, Boston, Massachusetts, USA, October 1995.
          • Marco Platzner and Bernhard Rinner. High-Performance Qualitative Simulation on a Multi-DSP Architecture. In Proceedings of the 6th International Conference on Signal Processing Applications & Technology, pages 725-729, Boston, Massachusetts, USA, October 1995.
          • Marco Platzner and Bernhard Rinner. Improving Performance of the Qualitative Simulator QSIM - Design and Implementation of a Specialized Computer Architecture. In Proceedings of the PDCS'95 International Conference on Parallel and Distributed Computing Systems, pages 494-501, Orlando, FL, USA, September 1995. ISCA.
          • Marco Platzner, Bernhard Rinner, and Reinhold Weiss. Parallel Qualitative Simulation. In Proceedings of the EUROSIM Congress '95, pages 231-236, Vienna, Austria, September 1995. Elsevier.
          • Gerald Friedl, Marco Platzner, and Bernhard Rinner. A Special-Purpose Coprocessor for Qualitative Simulation. In Proceedings of the EURO-PAR'95 International Conference on Parallel Processing, pages 695-698, Stockholm, Sweden, August 1995. Springer.
          • E. Brenner, R. Ginthör-Kalcsics, R. Hranitzky, M. Platzner, B. Rinner, Ch. Steger, and R. Weiss. High-Performance Simulators Based on Multi-TMS320C40. In Proceedings of the Fifth Annual Texas Instruments TMS320 Educators Conference, Houston, USA, August 1995.
          • Marco Platzner, Bernhard Rinner, and Reinhold Weiss. A Distributed Computer Architecture for Qualitative Simulation Based on a Multi-DSP and FPGAs. In Proceedings of the 3rd Euromicro Workshop on Parallel and Distributed Processing, pages 311-318, San Remo, Italy January 1995. IEEE CS Press.
          • Marco Platzner, Christian Steger, and Reinhold Weiss. Experimental Evaluation of Multi-DSP Architectures in High Performance Applications. In Proceedings of the 7th Mediterranean Electrotechnical Conference, Antalya, Turkey, April 1994. IEEE Press.
          • Marco Platzner, Christian Steger, and Reinhold Weiss. Performance Measurements on a Multi-DSP Architecture with TMS320C40. In Proceedings of the 4th International Conference on Signal Processing Applications & Technology, pages 1144-1152, Santa Clara, CA, USA, October 1993. DSP Associates.
          • Marco Platzner and Christian Steger. Erfahrungen mit einer Multi-Signalprozessorarchitektur (TMS320C40). In Mikroelektronik 93, pages 202-207, Vienna, Austria, October 1993. (in German)
          • Robert Ginthör-Kalcsics, Marco Platzner, and Reinhold Weiss. Experimental Results to Interprocessor Communication in Distributed Transputer-Systems. In Proceedings of the 1st Austrian-Hungarian Workshop on Transputer Applications, pages 45-54, Sopron, Hungary, October 1992.

          Tutorials

          • Jim Torresen, Kyrre Glette, Marco Platzner, and Paul Kaufmann. Evolvable Hardware. Tutorial and workshop at the International Conference on Architecture of Computing Systems (ARCS), Dresden, Germany, 2008. [ PDF ]

          • Marco Platzner. Reconfigurable Hardware Operating Systems. Tutorial at the IEEE International Conference on Field-programmable Technology (FPT), Singapore, 2005. [ PDF ]

          Technical reports

          • Marco Platzner and Bernhard Rinner. Design and Implementation of a Parallel Constraint Satisfaction Algorithm. Technical Report 96/04, Institute for Technical Informatics, Graz University of Technology, 1996.
          • Marco Platzner, Bernhard Rinner, and Reinhold Weiss. Parallel Qualitative Simulation. Technical Report 96/03, Institute for Technical Informatics, Graz University of Technology, 1996
          • Robert Ginthör-Kalcsics and Marco Platzner. Multi-DSP based Simulation of Special Purpose Processors. In Working Papers of the Parallel Processing Workshop, Lessach, Austria, September 1993. Published as Technical Report, Institut für Informatik, TU Clausthal, Germany. 1994.
          • Marco Platzner, Christian Steger, and Reinhold Weiss. Performance Measurements on a Multi-DSP Architecture with TMS320C40. Technical Report 374, IIG-Report-Series, Graz, Austria. February 1993.
          • Robert Ginthör-Kalcsics, Marco Platzner, and Reinhold Weiss. Interprocess Communication in Distributed Transputer Systems. Technical Report 355, IIG-Report-Series, Graz, Austria. February 1993.
          • Robert Ginthör-Kalcsics, Marco Platzner, Christian Steger, and Reinhold Weiss. Applikationen mit TMS320C30 (C40) & Signalverarbeitungs-Tools. Technical Report 92/06, Institute for Technical Informatics, Graz University of Technology. 1992. (in German)
          • Marco Platzner, Christian Steger, and Reinhold Weiss. DSP Technik: Marktübersicht und Entwicklungstrends. Technical Report 92/03, Institute for Technical Informatics, Graz University of Technology. 1992. (in German)
          • Marco Platzner, Christian Steger, and Reinhold Weiss. Parallele Digitale Signalprozessoren. Technical Report 92/01, Institute for Technical Informatics, Graz University of Technology. 1992. (in German)
          • Marco Platzner, Michael Moosburger, and Reinhold Weiss. Betriebssystem HELIOS: Message-Passing-Performance. Technical Report 91/04, Institute for Technical Informatics, Graz University of Technology. 1991. (in German)

          Others

          • Rolf Enzler and Marco Platzner. Dynamically Reconfigurable Processors. In Telematik, Zeitschrift des Telematik-Ingenieur-Verbandes, 7(1), 2001.
          • Marco Platzner, Bernhard Rinner, and Reinhold Weiss. A Distributed Computer Architecture for Fast Qualitative Simulation. In Texas Instruments, editor, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe's leading Universities, pages 106-107, 1998.

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